#Add a vivado project to synplify pro update
#Add a vivado project to synplify pro code

I've done this with Vivado TCL hooks and a well formatted package VHDL file. Version number, build number, timestamp, and basically everything you need can be modified (within the VHDL/Verilog code) automatically using a script which parses a known file format.

#Add a vivado project to synplify pro code

Implementation options Source code modification Need to remember to create the hooks in your Vivado project.Works with a GUI flow (automatically takes care of everything when you click on Synthesize).Using a post-bitstream TCL hook will allow you to connect a script to run just after bitstream file creation, and create a file name matching your updated version information, or other final operation you may require.

#Add a vivado project to synplify pro update

Using a pre-synthesis TCL hook will allow you to connect a script to run just before synthesis, and implement your version information update mechanism. Vivado has TCL hooks which you can use to run when you synthesize, implement, etc.

Does not flow well with GUI vendor tools (see Vivado TCL hooks).

Can be modified to work on any platform when using standard tools (be sure to take special care of file paths which differ between OS).

Can be hooked to any source control automation.

Complete control of what you want to do.

Think about the transportability of your project between designers and even design platforms (Windows, Linux, etc.). The most flexible way is to have some kind of builder script which may or may not be hooked to your source control mechanism (makefile, perl, python, etc.). ) and directory structure may influence the applicability of your solution.Īutomation options Makefile (builder script) automation The source files (VHDL, Verilog, System C. The system where you work may allow different forms of automation (OS, installed script tools, etc.). Different devices may allow you to do different things. Vendor Tools/Device/System/Source dependency: Implementation and automation of version information may depend on several things: Each vendor has different tools (even within the same vendor's). Version accessibility/observability: Where do you want to read the version number and have it viewable? In the source code? External file? The bitstream file name? The flash file contents? Do you need the FPGA logic to be able to access the version information (to be read via communication channel, embedded processor, etc.)? Version source and design flow: What sets the version? Is it a source control tool? Do you manually set the version? Do you need automation to update parts of the version information (timestamp, build number, etc.)? Version information format and size: What is the version? Is a natural number? String? Real? Do you save date or time stamp? Do you need a build number? Need extra space for sub-unit versions?